AMD EPYC Venice Is First 2nm HPC Chip On TSMC N2 Node

AMD EPYC Venice becomes the first 2nm HPC chip built on TSMC’s N2 node, pushing performance and energy efficiency to new heights

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AMD’s EPYC CPU, codenamed “Venice,” is the first HPC product to be taped out and introduced on the TSMC advanced 2nm (N2) manufacturing technology

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AMD’s data center CPU strategy, “Venice” expected next year, is advanced by AMD and TSMC’s semiconductor manufacturing collaboration

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AMD also validated its 5th Gen EPYC CPU products at TSMC’s new Arizona facility, demonstrating their commitment to US production

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According to AMD, the EPYC “Venice” processor is expected to be available in 2026

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It is anticipated that the cost of TSMC’s 2nm wafers will range from $25,000 to $30,000

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The cost of 2nm wafers is around 25% greater than that of 3nm wafers, which cost about $19,865. The cost of the 2nm wafers is over double that of the 5nm wafers, which were priced at about $13,495 in 2020

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