CUDIMM in Practice: Case Studies and Applications

Clocked UDIMMs and SODIMMs are another answer to DDR5 memory‘s signal integrity issues

CUDIMMs, standardised by JEDEC earlier this year as JESD323, add a clock driver (CKD) to the unbuffered DIMM to drive the memory chips

A clock driver is needed to keep DDR5 running reliably at high clockspeeds

JEDEC recommends CUDIMMs for DDR5-6400 speeds and above, with the initial version covering DDR5-7200

CKDs use signal conditioning characteristics including duty cycle correction to reduce jitter and clock signal timing fluctuations

The CKD synchronises memory chips and DIMMs by matching propagation delays for each clock path

Many memory module makers have yet to demonstrate their CKD-enabled devices since they are still learning the technology